| 摘要 |
PROBLEM TO BE SOLVED: To execute a plurality of instructions out of order like parallel processing by evading the occurrence of a data error due to dependency. SOLUTION: Included are an instruction fetch unit (106) and an execution unit (107) which executes instructions out of order, and the execution unit includes a register file, a plurality of function units, a 1st bus which transfers data from the register file to the plurality of function units, a 2nd bus which transfers data from the plurality of function units to the register file, and a load store unit which is so adapted as to send load requests to a memory system out of order for all instructions in an instruction window and store requests out in order for all the instructions in the instruction window. COPYRIGHT: (C)2003,JPO |
