| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a leak current can be prevented even if a defective memory is caused. <P>SOLUTION: A SRAM has a sub-power source line 140 of a plurality of rows supplying respectively power source voltage Vdd to a memory cell group of each row arranged along a Y direction, a main power source line 50 supplying the power source voltage Vdd to a sub-power source line of a plurality of rows, and a plurality of fuse elements 64A connecting a main power source line to the sub-power source line of a plurality of rows. A plurality of common connection parts 141 to which four sub-power source lines are connected commonly are provided at one end part of a sub-power source line 140 of a plurality of rows. Each of these plurality of common connection parts 141 is connected respectively to the main power source line 50 through each of the plurality of fuse elements 64A. The number of lines (four lines) of the sub-power source line 140 connected to the common connection part 141 coincides with the number of lines (four lines) of sub-word lines SWL, and also coincides with the number of lines (four lines) of redundant sub-word lines RSWL belonging to one redundant main word line RMWL. <P>COPYRIGHT: (C)2003,JPO |
