发明名称 BUILDUP MULTILAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a buildup multilayer wiring board in which the thickness of copper on a buildup surface layer is thin and on which a fine circuit can be formed. SOLUTION: In the buildup multilayer wiring board, an interlayer via is bored by a laser, an umbrella-shaped protrusion of a conductor layer formed in a via opening is left, a conductive paste is filled into the via, and a plated layer does not exist on the conductor layer. The method of manufacturing the buildup multilayer wiring board comprises a process in which the interlayer via is formed by the laser and in which the umbrella-shaped protrusion of the conductor layer is formed in the via opening and a process in which the conductive paste is filled into the via. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003179351(A) 申请公布日期 2003.06.27
申请号 JP20010377128 申请日期 2001.12.11
申请人 CMK CORP 发明人 SUZUKI AKIRA;SUGAO MASAOMI;MORITA KAZUTAKA
分类号 H05K1/11;H05K3/00;H05K3/40;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/11
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