发明名称 FLASH MEMORY DEVICE
摘要 PURPOSE: A flash memory device is provided to improve lowering phenomenon of a reading speed due to a loading operation of a word line by applying a voltage of a capacitor to a word line driver and a bit line driver at a read mode. CONSTITUTION: A flash memory device includes a pumping circuit(21), a capacitor, a word line decoder(22), a bit line decoder(25), a word line driver(23), and a bit line driver(24). The pumping circuit generates a pumping voltage higher than a supply voltage according to an enable signal. The capacitor is used for charging the electric potential according to the pumping voltage of the pumping circuit. The word line decoder and the bit line decoder are used for selecting a word line and a bit line of a predetermined cell of a flash memory cell array(26) by decoding an address signal. The word line driver and bit line driver are used for performing read operations by applying a predetermined voltage of the capacitor to the word line and the bit line of the selected cell.
申请公布号 KR20030052483(A) 申请公布日期 2003.06.27
申请号 KR20010082468 申请日期 2001.12.21
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JU, YEONG DONG
分类号 G11C16/06;G11C16/26;G11C16/30;(IPC1-7):G11C16/30 主分类号 G11C16/06
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