发明名称 SOLDER PASTE WAFER LEVEL PACKAGE AND METHOD FOR MANUFACTURING THE SAME
摘要 PURPOSE: A solder paste wafer level package and a method for manufacturing the same are provided to be capable of improving solder joint reliability and forming a rearrangement circuit line using a simple process. CONSTITUTION: A chip pad is formed at an active surface of a semiconductor chip(110). The first insulating layer(114) is formed on the active surface of the semiconductor chip for exposing the chip pad. A rearrangement circuit line(116) made of solder is formed at the first insulating layer. At this time, one end of the circuit line is electrically connected with the chip pad. The second insulating layer(118) is formed on the first insulating layer for protecting the circuit line and exposing the other end of the circuit line. A solder ball(120) is electrically connected through the second insulating layer to the exposed portion of the circuit line.
申请公布号 KR20030052655(A) 申请公布日期 2003.06.27
申请号 KR20010082678 申请日期 2001.12.21
申请人 HYNIX SEMICONDUCTOR INC. 发明人 BAEK, HYEONG GIL
分类号 H01L23/12 主分类号 H01L23/12
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