| 摘要 |
A data processing system comprising a cache memory, wherein a cache entry containing data is stored in the cache memory. A cache coordinator, wherein the cache coordinator invalidates one or more cache entries in response to a signal. An ID-based invalidation process, wherein a cache entry is associated with an ID that uniquely identifies the cache entry and can optionally be associated with one or more data ids that represent the underlying data contained in the cache entry, and the ID-based invalidation process sends a signal to the cache coordinator to invalidate all cache entries that either have that cache entry ID or have been associated with a data ID when the data that the ID represents changes. A time-limit-based invalidation process, wherein a cache entry can be associated with a time limit, and the time-limit-based invalidation process sends a signal to the cache coordinator to invalidate a cache entry whose time limit has expired. A URI-based invalidation process, wherein all cache entries generated by a template with that URI are invalidated when that template changes. A URI is a Universal Resource Identifier that identifies a template that generates different cache entries. For example, a product display template might have a URI named "productDisplay.jsp" that generate a page for each product. The present invention integrates all of these methods of invalidation into a single system.
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