| 摘要 |
A semiconductor memory device capable of preventing coupling noise being generated between adjacent bit lines in different columns. The device comprises first and second columns, wherein each column comprises a pair of bit lines, and wherein the first and second columns are adjacent, first and second sense amplifiers, each being connected to the bit lines of the first or second column, for sensing and amplifying a voltage difference between the bit lines of the first or second column, and a control circuit for controlling the first and second sense amplifiers. When the voltages of adjacent bit lines of the first and second columns transition in an opposite direction during a read operation, the control circuit controls the first and second sense amplifiers to concurrently amplify the voltages of the adjacent bit lines.
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