发明名称 Testing the interrupt priority levels in a microprocessor
摘要 A method of testing the priority levels of the interrupt sources of a microprocessor having a number of interrupt sources which are each operable to execute an interrupt service routine when enabled, each interrupt source having a default priority level and an associated memory, the interrupt sources having a service order in which they are to be serviced, the method comprising the steps of: (a) sorting the interrupt sources in descending service order; (b) determining an array of priority levels to be assigned in a pre-arranged sequence to selections of interrupts in descending service order; (c) incrementing a global counter; (d) assigning the array of priority levels to a selected group of interrupts, the remainder of the interrupts assuming their pre-assigned priority level; (e) enabling all interrupts simultaneously except the interrupt source having the highest priority level so that the interrupt having the second highest priority level executes its interrupt service routine; (f) transferring the value of the global counter into the memory of the interrupt executing its interrupt service routine; (g) enabling all interrupts simultaneously including the interrupt source having the highest priority level; (h) incrementing the global counter; (i) transferring the value of the global counter into the memory of the interrupt source executing its interrupt service routine; (j) repeating steps (c) to (i) until the pre-arranged sequence is completed and (k) comparing the interrupt memory values after completion of the pre-arranged sequence with expected values and determining from the comparison whether there is an error in the priority levels of the interrupt sources.
申请公布号 US2003120975(A1) 申请公布日期 2003.06.26
申请号 US20020293901 申请日期 2002.11.12
申请人 ATHANASSIADIS HARRY 发明人 ATHANASSIADIS HARRY
分类号 G06F13/26;(IPC1-7):H02H3/05 主分类号 G06F13/26
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