发明名称 |
Method for fabricating semiconductor device |
摘要 |
The present invention to provide a method for fabricating a semiconductor device capable of obtaining a proper process margin resulted from simultaneous formations of via holes in a multi-layered structure having depth differences without an additional process. To achieve this effect, the present invention includes the steps of: forming a first conductive layer; forming a first etching protection layer on the first conductive layer; forming a first insulating layer; forming a second conductive layer on the first insulating layer; forming a second etching protection layer on the second conductive layer, wherein etching protection efficiency of the second protection layer is higher than the first etching protection layer; forming a second insulating layer; and forming a first and a second via hole respectively exposing the first and the second conductive layer by selectively etching the first and the second insulating layer.
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申请公布号 |
US2003119225(A1) |
申请公布日期 |
2003.06.26 |
申请号 |
US20020293498 |
申请日期 |
2002.11.14 |
申请人 |
LEE SUNG-KWON;KIM SANG-IK |
发明人 |
LEE SUNG-KWON;KIM SANG-IK |
分类号 |
H01L21/768;(IPC1-7):H01L21/44 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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