发明名称 |
Viterbi decoder using restructured trellis |
摘要 |
Viterbi decoding is implemented using an asymmetrical trellis 70 having an A-trellis 72 and a B-trellis 74. The trellis 70 is designed for efficient implementation on a processing device 40 with arithmetic units 42 having multi-field arithmetic and logic capabilities By concurrently processing multiple path metrics in separate fields, a highly efficient decoder may be implemented in a software-controlled device.
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申请公布号 |
US2003120993(A1) |
申请公布日期 |
2003.06.26 |
申请号 |
US20010026348 |
申请日期 |
2001.12.21 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
COX DARRELL K. |
分类号 |
H03M5/14;H03M13/41;(IPC1-7):H03M13/03 |
主分类号 |
H03M5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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