发明名称 |
SACRIFICIAL INLAY PROCESS FOR IMPROVED INTEGRATION OF POROUS INTERLEVEL DIELECTRICS |
摘要 |
A nonporous sacrificial layer (30) is used to form conductive elements (34) such as vias or interconnects in an inlay process, resulting in smooth walled structures of the inlaid vias or interconnects and smooth walled structures of any surrounding layers such as barrier layers. After formation of the smooth walled conductive elements, the sacrificial layer (30) is removed and replaced with a porous dielectric (40), resulting in desirable porous low-k dielectric structures integrated with the smooth walled conductive elements and barrier materials.
|
申请公布号 |
WO03052816(A1) |
申请公布日期 |
2003.06.26 |
申请号 |
WO2002US39736 |
申请日期 |
2002.12.11 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
ADEM, ERCAM;ERB, DARRELL, M. |
分类号 |
H01L21/768;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|