发明名称 Distortion compensation circuit
摘要 To reduce a time period required for convergence of distortion compensation data without impairing any stability of distortion compensation. An error computation and compensation data updating section repeats a computation in which errors between an input orthogonal baseband transmission signal and a feedback signal obtained by demodulating part of the output from a power amplifier is computed to obtain error data and values obtained by multiplying this error data by step coefficients alpha (rn) and beta (rn) are added to distortion compensation data Kn and &thetas;n before updating, thereby computing distortion compensation data Kn+1 and &thetas;n+1 after updating. Distortion compensation data for compensation on nonlinear distortion is thus updated. Step coefficients alpha and beta are stored in a step coefficient data memory with respect to each of different input signal amplitude values. Step coefficients alpha (rn) and beta (rn) corresponding to input signal amplitude value rn computed by an amplitude computation section are output from the memory to multipliers. <IMAGE>
申请公布号 EP1322034(A1) 申请公布日期 2003.06.25
申请号 EP20020028586 申请日期 2002.12.20
申请人 NEC CORPORATION 发明人 DOI, YOSHIAKI
分类号 H03F1/32;(IPC1-7):H03F1/32 主分类号 H03F1/32
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