发明名称 METHOD FOR FORMING DUAL DAMASCENE PATTERN OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a dual damascene pattern of a semiconductor device is provided to be capable of easily forming a via hole though aspect ratio is increased, improving etching profile, and preventing the generation of misalignment. CONSTITUTION: The first insulating layer(12) is formed on a semiconductor substrate(11) having a predetermined structure. A via hole(15) is formed at the predetermined portion of the first insulating layer. The second insulating layer(16) is formed on the first insulating layer. At this time, voids is generated at the via hole(15). A trench(19) is formed at the second insulating layer(16) for opening the upper portion of the via hole(15). At this time, a dual damascene pattern(100) made of the trench(19) and via hole(15), is completed.
申请公布号 KR20030050778(A) 申请公布日期 2003.06.25
申请号 KR20010081296 申请日期 2001.12.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, JONG YEOL
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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