| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to be capable of minimizing losses of a hard mask when forming an SAC(Self Align Contact). CONSTITUTION: A planarized first insulating layer(15) is formed on a substrate(10) having a plurality of conductive patterns. An etch stop layer(16) is formed on the first insulating layer(15) overlapped with the conductive patterns. The second insulating layer(18) is formed on the first insulating layer and the etch stop layer. A contact hole(20) is formed to expose the surface of the substrate(10) by selectively etching the second and first insulating layer. The first and second insulating layer(15,18) are one selected from a group consisting of HTO(High Temperature Oxide), APL(Advanced Planarization Layer), SOD(Spin On Dielectric), SOG(Spin On Glass), and TEOS(Tetra Ethyl Ortho Silicate).
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