发明名称 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for fabricating a semiconductor device is provided to embody low resistance and excellent thermal stability by increasing an area of a gate through a selective epitaxial growth(SEG) process performed before a salicide process. CONSTITUTION: A gate electrode(22) is formed on a semiconductor substrate(21). A low density impurity region(23) is formed in the surface of the semiconductor substrate at both sides of the gate electrode. The first and second gate sidewalls(24,25) are formed on both side surfaces of the gate electrode, overlapping each other. Source/drain ions are implanted to form a source/drain region(26). An insulation layer for planarization is formed to completely cover the gate electrode and the first and second gate sidewalls. The insulation layer for planarization is planarized to expose the upper surface of the gate electrode. The planarized insulation layer is etched to recess a part of the first gate sidewall. Gate ions are implanted into the gate electrode. An SEG process is performed on the surface of the exposed gate electrode to form an epitaxial layer(29). A salicide layer(30) is formed on the source/drain region and the epitaxial layer.
申请公布号 KR20030050358(A) 申请公布日期 2003.06.25
申请号 KR20010080779 申请日期 2001.12.18
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHA, HAN SEOP;LEE, SANG UK
分类号 H01L21/265;(IPC1-7):H01L21/265 主分类号 H01L21/265
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