| 摘要 |
PURPOSE: A method for fabricating a metal interconnection of a semiconductor device is provided to increase an operating speed by improving a resistor-capacitor(RC) delay in forming the metal interconnection. CONSTITUTION: A lower conductive layer and an etch stop layer are sequentially stacked on a semiconductor substrate including an underlying layer. The etch stop layer and the lower conductive layer are selectively removed to form an etch stop layer pattern and a lower conductive layer pattern. An insulation layer having a low dielectric constant is formed between the etch stop layer and the lower conductive layer. A plurality of dummy holes(35) are formed in the insulation layer of the low dielectric constant. An insulation layer is formed on the resultant structure and is selectively patterned to form a via hole(41) exposing the lower conductive layer pattern. A conductive plug is formed in the via hole. An upper interconnection(45) is formed on the conductive plug.
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