发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to be capable of reducing the thickness difference of an oxide layer before carrying out an STI(Shallow Trench Isolation) CMP(Chemical Mechanical Polishing) process by depositing a PE-TEOS(Plasma Enhanced-Tetra Ethyl Ortho Silicate) oxide layer after depositing an HDP(High Density Plasma) oxide layer. CONSTITUTION: A trench is formed in a semiconductor substrate(11). An insulating multilayer is formed on the entire surface of the resultant structure for completely filling the trench. Then, a planarization process is carried out on the insulating multilayer. Preferably, the insulating multilayer is made of an HDP oxide layer(12), and a PE-TEOS layer(13).
申请公布号 KR20030049354(A) 申请公布日期 2003.06.25
申请号 KR20010079545 申请日期 2001.12.14
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOON, IL YEONG
分类号 H01L21/762;(IPC1-7):H01L21/762 主分类号 H01L21/762
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