| 摘要 |
A wireless communications device (30) is disclosed, in which certain digital coding functions are realized according to a modified multiplier architecture. The device (30) includes an encode and modulate function (54) within which convolutional coding function (60) is provided. According to one alternative, convolutional coding function (60) is realized by way of a modified parallel multiplier (90), in which carries among adder units are ignored or not generated. The datastream x(k) is applied to the multiplier as the multiplicand, while successive sets of code generator polynomial coefficients are applied as a multiplier. The parallel multiplier (90) is modified in that carry-in and carry-out bits among the adder units are selectably blocked in a coding mode, but passed in a multiplier mode. A similar arrangement of a modified parallel multiplier circuit (90') may be used in generating a scrambling code that is applied prior to transmission. In either case, the modified multiplier architecture provides flexibility in the convolutional coding and in generation of the scrambling code, while not adversely impacting performance or chip area. <IMAGE>
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