发明名称 DEVICE AND METHOD FOR PARALLEL SHUFFLE MEMORY FOR SEPARABLE CONVERSION
摘要 PURPOSE: A device and a method for a parallel shuffle memory for separable conversion are provided to improve the efficiency of an FFT(Fast Fourier Transform)/DCT(Discrete Cosine Transform) operation system, and to reduce the unit cost of production by efficiently performing a fast operation. CONSTITUTION: An input network(110) switches a shuffle path of the parallel data inputted from the first separate operation unit and outputs it. A memory(130) is equipped with a plurality of memory units in order to output the parallel data in column-first after temporarily storing the parallel data output from the input network(110) in line-first. An output network(120) switches the shuffle path of the parallel data output from the memory(130) and outputs it to the second operation unit. A controller(140) controls the line-first input operation and the column-first output operation of the parallel data by controlling the switch of the shuffle path of the input and output network, and generating a memory address of the parallel data inputted/output through the memory(140).
申请公布号 KR20030048663(A) 申请公布日期 2003.06.25
申请号 KR20010078635 申请日期 2001.12.12
申请人 DAWIN TECHNOLOGY INC. 发明人 KIM, GWANG SIK;KIM, SEON HO
分类号 G06F15/16;(IPC1-7):G06F15/16 主分类号 G06F15/16
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