发明名称 PROCESSOR, PROCESSING SYSTEM AND PACKET PROCESSING METHOD
摘要 PURPOSE: A processor, a processing system and a packet processing method are provided to perform packet routing, packet switching and other packet processing operations. CONSTITUTION: An internal memory(104) is associated with a processor(102) and is operatively coupled to a packet analyzer(200). The packet analyzer(200) is operative to at least partially analyze one or more packets received by the processor(102) in order to determine a portion of the packet to be stored in the internal memory(104). The portion of the given packet when being stored in the internal memory(104) is configured to store substantially the entire given packet and is accessible for subsequent processing within the processor(102) without requiring access to an external memory(106) associated with the processor(102).
申请公布号 KR20030051381(A) 申请公布日期 2003.06.25
申请号 KR20020081021 申请日期 2002.12.18
申请人 AGERE SYSTEMS INC. 发明人 CALLE MAURICIO;DAVIDSON JOEL R.;HATHAWAY MICHAEL W.;KIRK JAMES T.
分类号 H04L12/24;H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/24
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