| 摘要 |
A clock driver chip has several banks of clock outputs driven by a single clock reference. Each clock output is driven by large pull-up and pull-down transistors, which have gates driven by pre-driver lines generated by a pre-driver circuit. Individual clock outputs, or a bank of outputs, are enabled by enable signals. A shorting switch is activated when enables for a pair of clock outputs are in a same state. The shorting switch has two transmission gates. One transmission gate shorts the pre-driver lines to the large p-channel transistors of the pair of outputs, while the other transmission gate shorts the pre-driver lines to the large n-channel transistors of the pair of outputs. Pre-driver lines to the pull-up transistors within a bank driven by the same enable can be hardwired together, as can the pre-driver lines to the pull-down transistors. Shorting switches can short banks together to reduce output skew.
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