| 摘要 |
An apparatus is disclosed for capturing and transferring internal system activity of a computer under test. In one embodiment, the apparatus includes a bus interface, a memory, an external interface, and circuitry coupling the three together. The bus interface connects to an internal system bus of the system under test. The memory is for storing information indicative of internal system activity. The external interface couples to an external, monitoring system. The circuitry partitions the memory into at least two banks, each having multiple buffers. One of the multiple buffers in each bank is a trace buffer that receives instruction trace information from the processor of the system under test. The multiple buffers may further include a system memory image buffer, a processor data buffer, and a bus activity buffer. When any one of the buffers in a given bank of the memory becomes full, a bank switch occurs. Immediately prior to the bank switch, the contents of system memory are copied to the system memory image buffer, and the internal settings of the processor are similarly copied to the processor data buffer. Advantageously, if any errors are detected at this time, the previous memory bank still contains a pre-error snapshot of the processor contents and memory contents. Furthermore, the previous memory bank has an extensive record of pre-error bus activity and trace history. The external interface provides a means for transporting the memory bank contents to an external system continually, or alternately, whenever the memory bank contents are desired (e.g. when a fault is detected).
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