发明名称 PACKAGING METHOD OF ELEMENT, ELECTRONIC EQUIPMENT, FLAT PANEL DISPLAY, SYSTEM-IN-PACKAGE-TYPE IC, AND OPTICAL ELECTRICAL IC
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for packaging, for example, even a small-sized chip to a substrate with excellent position accuracy in a packaging method of a new element. <P>SOLUTION: The packaging method of elements comprises a first process for preparing a first laminate having a device layer 12 including an element on a first substrate 10 and a second laminate having a separation layer 22 on a second substrate 20, a second process for joining the first and second laminates so that the device layer 12 opposes the separation layer 22, a third process for separating the laminate including the device and separation layers by a specific pattern and for forming a plurality of chips 30 including the elements on the second substrate, and a fourth process for joining a specific chip 30a in the chips to a third substrate 40 at a specific position on the third substrate, after that, for separating the second substrate 20 from the specific chip 30a in the isolation layer 22, and for packaging the specific chip 30a to the third substrate 40. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003174041(A) 申请公布日期 2003.06.20
申请号 JP20010373097 申请日期 2001.12.06
申请人 SEIKO EPSON CORP 发明人 SHIMODA TATSUYA;KONDO TAKAYUKI
分类号 H01L21/52 主分类号 H01L21/52
代理机构 代理人
主权项
地址