发明名称 DRIVER CIRCUIT AND DECODER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a decoder circuit realizing high speed operation without increasing remarkably current consumption. SOLUTION: The circuit is provided with an output driving section provided with a PMOS transistor for transitting an output signal to a high potential from a low potential by switching an input signal to a low potential from a high potential and a NMOS transistor for transitting an output signal to a low potential from a high potential by switching a reset signal externally supplied to a high potential to a low potential. Two inverters whose input and output terminals are connected respectively, a driver circuit having an output holding section for holding an output signal of the output driving section and a latch section for holding a gate potential of the NMOS transistor of the output driving section at a low potential even if a reset signal is made a high potential when an output signal of the output driving section is a low potential and for preventing turning on of the NMOS transistor is provided at the last stage of the decoder circuit. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003173684(A) 申请公布日期 2003.06.20
申请号 JP20010368672 申请日期 2001.12.03
申请人 NEC CORP 发明人 TAKEDA KOICHI
分类号 G11C11/418;G11C11/413;H03K19/0175;(IPC1-7):G11C11/418;H03K19/017 主分类号 G11C11/418
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