发明名称 |
SELF ALIGNED COMPACT BIPOLAR JUNCTION TRANSISTOR LAYOUT, AND METHOD OF MAKING SAME |
摘要 |
The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A leakage block structure is formed in the substrate by out-diffusion from the spacer. Thereafter a BJT is completed with the base layer and the spacer. |
申请公布号 |
WO03050876(A2) |
申请公布日期 |
2003.06.19 |
申请号 |
WO2002US39405 |
申请日期 |
2002.12.10 |
申请人 |
INTEL CORPORATION |
发明人 |
BOHR, MARK;AHMED, SHAHRIAR;CHAMBERS, STEPHEN;GREEN, RICHARD;MURTHY, ANAND |
分类号 |
H01L21/331 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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