发明名称 DEVICE FOR MODULAR MULTIPLICATION
摘要 PURPOSE: A device for a modular multiplication is provided to execute a modular multiplication at high speed by repeating a bit multiplication and executing a modular multiplication of data more than a specific bit, thereby reducing a circuit area of a modular multiplication device, and a reducing memory accessing times using a register for storing a mid-point. CONSTITUTION: A memory(160) stores data for executing a modular multiplication of information. A processor requests the modular multiplication and loads/uses the multiplication results from the memory(160). A register(230) receives data for a modular multiplication from the memory(160), stores the data, and stores a mid-point being generated during the modular multiplication. A modular circuit(240) repeats a bit multiplication calculation, executes a modular multiplication of data which are greater than a specific bit, and stores a mid-point in the register(230) and a result value in the memory(160). A reduction circuit(250) corrects the result value selectively in accordance with a comparison result of the result value and the modular value. A control circuit(220) outputs various kinds of control signals to the register(230), the modular circuit(240), and the reduction circuit(250), and controls the modular multiplication.
申请公布号 KR20030048243(A) 申请公布日期 2003.06.19
申请号 KR20010078127 申请日期 2001.12.11
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 CHOI, YONG JE;JUNG, GYO IL;KIM, HO WON;KIM, MU SEOP;PARK, YEONG SU
分类号 G06F7/44;(IPC1-7):G06F7/44 主分类号 G06F7/44
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