| 摘要 |
An integrated memory having a memory cell array: including word lines for selecting memory cells, bit lines for reading out or writing data signals of the memory cells, a precharge circuit for precharging at least one of the bit lines to a precharge voltage that differs from a supply voltage of the memory. The precharge circuit has a loop regulating circuit for setting the precharge voltage using an actual voltage of the one of the bit lines. The precharge circuit makes it possible to reduce the power loss of the memory in conjunction with low area consumption.
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