A system with a transmitter for transmitting digital data via an interface to a receiver. The interface has at least one data lineand a clock line. A clock generator supplies a clock signal to the clock line. The receiver uses the clock signal received from the clock line for deriving timing information for processing received digital data. The clock signal may have an amplitude that is lower than the power supply voltage VDD, typically less than halfof the power supply voltage, and less stringent requirements can be applied to the waveform of the clock signal than traditionallyapplied to data and clock signals. The clock signals are hereby less power consuming and cause significantly less electromagnetic interference.
