发明名称 DATA INPUT/OUTPUT PORT CIRCUIT
摘要 PURPOSE: A data input/output port circuit is provided to select a resistant value of a pull-up resistance by considering a trade-off relation between a data transmission/reception speed and the amount of current consumption. CONSTITUTION: A data input/output port circuit includes a plurality of pull-up resistances(R1-R4), a switching circuit(SW1-SW7), the first logic circuit(112), the second logic circuit(111), the first transistor(114), and the second transistor(115). The pull-up resistances are connected to the source voltage. The switching circuit is used for connecting one of the pull-up resistances with a data input/output line in response to a resistant value selection signal. The first logic circuit receives a transmission mode signal and a data output signal. The second logic circuit receives an open-drain signal, the transmission mode signal, and an output of the first logic circuit. The first transistor has a source connected to the supply voltage, a drain connected to the data input/output line, and a gate connected to an output of the second logic circuit. The second transistor has a drain connected to the data input/output line, a source connected to an earth voltage, and a gate connected to an output of the first logic circuit.
申请公布号 KR20030047342(A) 申请公布日期 2003.06.18
申请号 KR20010077811 申请日期 2001.12.10
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JU IL
分类号 H03K19/0175;(IPC1-7):H03K19/017 主分类号 H03K19/0175
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