Current switching logic circuit generating matched rise and fall times

摘要

A logic circuit for receiving a plurality of input differential signal pairs expressing respective logic inputs and for sequentially performing a plurality of logic operations on said logic inputs in successive logic stages, the logic circuit comprising a plurality of current switching sections corresponding to respective ones of said logic stages, with each of said current switching sections performing predetermined logic processing on a plurality of differential control signal pairs having a plurality of level ranges, a control signal generating section for converting each pair of said plurality of input differential signal pairs to a plurality of corresponding differential signal pairs having a plurality of level ranges, and supplying said corresponding differential signal pairs to a current switching section of a first logic stage, as respective differential control signal pairs, a plurality of inter-stage output signal generating sections each adapted to convert a differential signal pair produced by a preceding one of said current switching sections to produce a corresponding plurality of differential control signal pairs having respectively different level ranges and supplying said differential control signal pairs to a succeeding one of said current switching sections, and an output signal generating circuit for converting a differential signal pair produced by a current switching section of a final logic stage to an output differential signal pair. <IMAGE>