| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To restrain increase of wiring capacitance in a wiring layer and restrain increase of self-inductance in a wiring layer in a semiconductor device having a package substrate with a multilayer wiring layer. <P>SOLUTION: A package substrate 1 has a first and second wiring layers formed on both sides of an insulation substrate 10. A signal wiring is formed on the first wiring layer and a power wiring on the second wiring layer 12. The first and second wiring layers are electrically connected mutually through vias 121, 122 passing through an insulation layer. In a power wiring of the second layer 12, a second power wiring (VCC2) 124 is formed being divided into a plurality of island-like regions and a connection path 125a of a third power wiring (GND wiring) 125 is formed between adjacent island-like regions. <P>COPYRIGHT: (C)2003,JPO</p> |
