发明名称 |
SINGLE TWIN SILICON BURIED ERASABLE AND PROGRAMMABLE ROM |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an erasable and programmable ROM capable of saving a layout space and capable of matching the manufacturing process of a CMOS. <P>SOLUTION: The programmable ROM comprises a first and second PMOSs connected in series and the first p-type metallic oxide film semiconductor is employed as a select transistor. The gate electrode of the select transistor is connected to a select gate voltage (VSG) and a first terminal (source) is connected to a source line voltage (VSL) while the second terminal (drain) is connected in series to the first terminal of a second p-type metallic oxide semiconductor (PMOS). The second terminal of the second p-type metallic oxide film semiconductor (PMOS) is connected to the bit line voltage (VBL) and the gate electrode of the second p-type metallic oxide film semiconductor (PMOS) is used as a floating gate. <P>COPYRIGHT: (C)2003,JPO</p> |
申请公布号 |
JP2003168747(A) |
申请公布日期 |
2003.06.13 |
申请号 |
JP20010359686 |
申请日期 |
2001.11.26 |
申请人 |
EMEMORY TECHNOLOGY INC |
发明人 |
YO SEISHO;CHIN SHIKETSU;JO SEISHO |
分类号 |
G11C16/04;G11C16/02;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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