发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To enable further reduction of ON resistance while high breakdown voltage characteristics is maintained in a high breakdown voltage MOS transistor. SOLUTION: This semiconductor device is provided with an n-type stretched drain region 101 and a source region 102 which are formed with an interval, on a p-type semiconductor substrate 100. The stretched drain region 101 is provided with a first and a second p-type buried layers 104A, 104B which are extended almost in parallel to a surface of a substrate and formed with an interval in a depth direction and in which p-type impurity layers are buried. Concentration of n-type impurities in a region which is a region except the p-type buried layers 104A, 104B in the extended drain region 101 and whose depth from the surface of the substrate is about 6μm is at least about 1×10<SP>15</SP>/cm<SP>3</SP>and at least 30% of the concentration of n-type impurities of a region whose depth is about 2μm. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003168797(A) 申请公布日期 2003.06.13
申请号 JP20010368089 申请日期 2001.12.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 UNO TOSHIHIKO
分类号 H01L21/265;H01L29/06;H01L29/08;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L21/265
代理机构 代理人
主权项
地址