发明名称 MAGNETIC RANDOM ACCESS MEMORY
摘要 <p><P>PROBLEM TO BE SOLVED: To suppress increase of the number of wiring, to reduce the process cost and to improve the flatness even when TMR elements are stacked in multiple stages. <P>SOLUTION: The TMR elements 10 are stacked on a semiconductor substrate in multiple stages. To a fixed layer of the TMR elements 10, first wiring 11A extended in an X direction and functioning as read wiring is connected. To a free layer of the TMR elements 10, second wiring 12A extended in the X direction and functioning as a write wiring and a read wiring is connected. The write wiring 13 is extended in a Y direction and shared by two TMR elements 10 present above and below it. The two TMR elements 10 present above and below the write wiring 13 are arranged symmetrically to the write wiring 13. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003168785(A) 申请公布日期 2003.06.13
申请号 JP20010367754 申请日期 2001.11.30
申请人 TOSHIBA CORP 发明人 KAJIYAMA TAKESHI
分类号 G11C11/14;G11C11/15;H01L21/8246;H01L27/105;H01L43/08;(IPC1-7):H01L27/105 主分类号 G11C11/14
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