| 摘要 |
Disclosed is a semiconductor arrangement (200), especially a diode, with a pn transition, embodied as a chip with an edge area, comprising a first layer (2) of a first conductivity type and a second layer (1, 3) of a second conductivity type. The second layer (1, 3) consists of at least two partial layers (1, 3). Said two partial layers (1, 3) form a pn transition with the first layer (2). The pn transition of the first layer (2) with the first partial layer (3) is exclusively provided inside the chip and the pn transition between the first layer (2) and the second partial layer (1) is provided in the edge area of the chip. For each cross-section of the chip surface parallel to the plane of the chip, the first partial layer (3) solely corresponds to part of said cross-section. |
