发明名称 ON CHIP SMART CAPACITORS
摘要 A semiconductor chip has first and second power supply lines and a capacitor having first and second capacitive electrodes. The first capacitive electrode is coupled to the first power supply line. A transistor has first and second current carrying electrodes and a control electrode. The first current carrying electrode is coupled to the second capacitive electrode, and the second current carrying electrode is coupled to the second power supply line. A logic controller is coupled to the second capacitive electrode and to the control electrode. The logic controller is effective to detect a defect in the capacitor and to operate the transistor so as to disconnect the capacitor from the first and second power supply lines in the event that the logic controller detects a defect in the capacitor.
申请公布号 WO03049153(A2) 申请公布日期 2003.06.12
申请号 WO2002US37479 申请日期 2002.11.21
申请人 HONEYWELL INTERNATIONAL INC. 发明人 FECHNER, PAUL, S.
分类号 H01G2/12;H01L21/00;H01L21/66;H01L27/02 主分类号 H01G2/12
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