Apparatus and method for on-chip jitter measurement

摘要

A jitter measurement circuit is described comprising delay elements, and first and second set of circuitry. Each delay elements has an associated delay, an input configured to receive an input clock signal. The first set of circuitry detects the significant instant on the input clock signal. The first set of circuitry is also configured to output a signal responsive to the significant instant on the input clock signal. The second set of circuitry receives the signal responsive to the significant instant on the input clock signal and a first trigger signal. Also, the second set of circuitry latches onto the signal responsive to the significant instant on the input clock signal and is further responsive to a significant instant on the first trigger signal. A measure for jitter is determined from the latched signal responsive to the significant instant on the input clock signal.