Dual loop phase lock loops using dual voltage supply regulators

摘要

Dual loop phase lock loops having a high loop bandwidth with low power consumption are described. Each loop is provided with a voltage supply regulator circuit which regulates the voltage of a portion of each loop. In one embodiment, the outer loop employs a regulation circuit comprising a two stage operational amplifier which is compensated by a compensation circuit that is configured to ensure that the dominant pole of the operational amplifier is associated with the first stage of the operational amplifier.