| 摘要 |
PURPOSE: A method of controlling uplink timing in a DS(Direct Sequence)-CDMA system is provided to assign 2 bits or 3 bits for timing control bits of a down-link traffic channel, and to implement multi-step variable slewing step size, thereby ideally adjusting up-link synchronization. CONSTITUTION: A base station measures a slewing up-link synchronization value for a response signal of an initial signal(S101). The base station decides whether the value is slewed more than '1' chip(S102). If so, the base station generates a 3-bit timing control bit by using fixed slewing step size only(S103). The base station transmits the 3-bit timing control bit to a mobile station(S104). The base station decides whether the mobile station transmits another signal(S105). If so, the base station measures a slewing up-link synchronization value of the signal(S106). The base station decides whether the value is slewed more than '1' chip(S107). If so, the base station generates a 3-bit timing control bit by using all slewing step size, and proceeds to the step 'S104'(S108).
|
