| 摘要 |
PURPOSE: A device for processing a repeated operation using a memory is provided to enhance the accuracy and a processing speed of the repeated data operation by realizing an algorithm executing the repeated operation as hardware configuration through simple address control. CONSTITUTION: A controller(100) transmits an addressing instruction and controls the data I/O(Input/Output). An address generator(200) assigns an upper/lower address. The memory(300) assigns the output data by receiving the upper/lower address. A demultiplexer(400) receives and respectively transmits the data of the upper/lower address by receiving a read signal. An output register(500) receives and respectively transmits the data of the upper/lower address. The first operator(600) executes the operation by receiving the data stored in the upper/lower address, and transmits a result. The second operator(700) executes a symmetrical operation by receiving the data stored in the upper/lower address, and transmits the result. An input register(800) respectively receives and outputs the operated data. A multiplexer(900) stores the operated data in the memory(300) serially by receiving a write signal.
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