发明名称 Method for verifying control of manufacturing process, involves fabricating device-model which contains time delays caused by actual execution of manufacturing process
摘要 A method for verifying control of a manufacturing process, in which a software model (12,13) is fabricated, which contains the time conditions/demands from the control for the correct carrying out of the manufacturing process. A device model (17) is fabricated which contains the time lags/delays caused by the actual manufacturing process and during which it is verified by a computer, whether the actual time delays which have arisen are compatible with the time demands to be met. An Independent claim is given for a computer for verifying control of manufacturing process.
申请公布号 DE10157657(A1) 申请公布日期 2003.06.12
申请号 DE2001157657 申请日期 2001.11.26
申请人 FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. 发明人 BRAATZ, ARNULF;DUERR, MARK
分类号 G05B17/02;G05B23/02;(IPC1-7):G06F17/60 主分类号 G05B17/02
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