发明名称 |
Floating-point calculation apparatus |
摘要 |
A value of difference between exponent values and an inverted value thereof obtained by an inverting circuit are calculated using one subtractor and one of the value of the difference and the inverted value of the difference is selected in accordance with a signal indicating which of the exponent values is greater. Only one subtractor is used, so that the scale of the circuit is reduced and the reduction in chip real estate and power consumption can be achieved. Thus, a circuit for calculating an absolute value of difference between exponent values for right-shifting a floating-point number is provided, with reduced chip real estate and power consumption.
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申请公布号 |
US6578060(B2) |
申请公布日期 |
2003.06.10 |
申请号 |
US19990275079 |
申请日期 |
1999.03.24 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
CHEN ADDISON;SUZUKI HIROAKI |
分类号 |
G06F7/485;G06F7/00;G06F7/38;G06F7/42;G06F7/50;(IPC1-7):G06F7/42 |
主分类号 |
G06F7/485 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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