发明名称 Methods for producing high reliability lead frame and packaging semiconductor die using such lead frame
摘要 A lead frame includes a first side rail, a second side rail spaced apart from the first side rail, a center rail disposed between the first side rail and the second side rail, and a plurality of package locations. Each package location includes a first and a second die attach paddle. The first die attach paddle supports a first side of a semiconductor die and is coupled only to the first side rail or to the second side rail. The second die attach paddle supports a second side of the semiconductor die and is coupled only to the center rail. The first and second die attach paddles are separate and unconnected to each other and may be generally circular in shape. An aggregate surface area of the first and second paddles may be less than about 25 percent of a surface area of the semiconductor die. By limiting the surface area of the interfaces between the lead frame and the silicon die and the surface area of the interfaces between the lead frame and the molding compound, moisture-related problems and problems related to the differing coefficients of thermal expansion (such as delamination and/or cracks, for example) of the constituent materials of the resultant semiconductor device are minimized.
申请公布号 US6576491(B1) 申请公布日期 2003.06.10
申请号 US20010964716 申请日期 2001.09.26
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 CHANG BO SOON;VERMA VANI;ODEJAR ANTHONY
分类号 H01L23/495;(IPC1-7):H01L21/50 主分类号 H01L23/495
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