发明名称
摘要 A method for forming a dual damascene line structure includes forming an inter-metal dielectric including a first region and a second region on a semiconductor substrate, forming a first hard mask material layer on an entire surface of the inter-metal dielectric, removing the first hard mask material layer on the first region, forming a second hard mask material layer on an entire surface of the inter-metal dielectric, forming a hard mask to remove a portion of the first hard mask material layer on the second region, etching the inter-metal dielectric of the first region to a first thickness using the hard mask, exposing the inter-metal dielectric of the second region, and etching the exposed inter-metal dielectric to simultaneously form a via hole and a trench having the via hole.
申请公布号 KR100386622(B1) 申请公布日期 2003.06.09
申请号 KR20010036970 申请日期 2001.06.27
申请人 发明人
分类号 H01L21/28;H01L21/3065;H01L21/768 主分类号 H01L21/28
代理机构 代理人
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