METHOD FOR CONNECTING POWER METAL LINES OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for connecting power metal lines of a semiconductor device is provided to reduce resistance by greatly broadening an area for connecting upper and lower power supply lines as compared with a conventional hole. CONSTITUTION: An interlayer dielectric is deposited on a lower metal line and a photoresist layer is applied to the interlayer dielectric. A reticle or mask including a plurality of holes is located on the photoresist layer. An exposure/development process is performed over a critical interval of time so that a photoresist layer pattern is formed in which hole patterns are interconnected. The interlayer dielectric is etched to expose the lower power metal line by using the photoresist layer pattern as a mask. The photoresist layer pattern is eliminated and the etched portion of the interlayer dielectric is filled with a conductive material.