| 摘要 |
A memory device capable of improving the degree of integration and effectively preventing false data reading is obtained. This memory device comprises a pair of bit lines extending in a prescribed direction, a word line arranged to intersect with the pair of bit lines and a memory cell, arranged between the pair of bit lines and the word line, consisting of two capacitance means. Thus, the area of the memory cell is reduced and no reference voltage is required.
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