发明名称 Semiconductor chip package and method of manufacturing same
摘要 A semiconductor chip package, an electronic system, and a method of manufacturing such package. A lower structure includes a lower insulating layer and a metal layer made of separate electrical conductors. A wall defines a cavity on the metal layer. Electrical conductors extend from the metal layer to contact points elsewhere in the semiconductor chip package. Conductor members are positioned on the electrical conductors of the metal layer. A semiconductor chip is positioned on the conductor members within the cavity, with an isolation area between the semiconductor chip and the wall. The electrical contacts on the semiconductor chip contact the conductor members to couple the semiconductor chip to the contact points. Underfill material is provided within the isolation area between the perimeter surface and the wall, and is prevented by the wall from spreading to other areas. Placement of the semiconductor chip within the cavity reduces the package thickness.
申请公布号 US2003104652(A1) 申请公布日期 2003.06.05
申请号 US20010999169 申请日期 2001.12.03
申请人 LEBONHEUR VASSOUDEVANE;MALLIK DEBENDRA;BOLANOS EDUARDO J. 发明人 LEBONHEUR VASSOUDEVANE;MALLIK DEBENDRA;BOLANOS EDUARDO J.
分类号 H01L21/56;H01L23/13;H01L23/498;H01L25/065;(IPC1-7):H01L21/44 主分类号 H01L21/56
代理机构 代理人
主权项
地址
您可能感兴趣的专利