发明名称 Non-volatile semiconductor memory device and memory system using the same
摘要 The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines (BL) basing upon a change, after the pre-charge, of the potential at each bit line (BL), without changing the column address. A collective verify signal is output when each bit of a page of data has been written into the memory.
申请公布号 EP1316963(A2) 申请公布日期 2003.06.04
申请号 EP20030003268 申请日期 1992.12.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANAKA, TOMOHARU;MOMODOMI, MASAKI;KATO, HIDEO;NAKAI, HIROTO;TANAKA, YOSHIYUKI;SHIROTA, RIICHIRO;ARITOME, SEIICHI;ITOH, YASUO;IWATA, YOSHIHISA;NAKAMURA, HIROSHI;ODAIRA, HIDEKO;OKAMOTO, YUTAKA;ASANO, MASAMICHI;TOKUSHIGE, KAORU
分类号 G11C29/00;G06F11/10;G11C16/06;G11C16/10;G11C16/12;G11C16/24;G11C16/34;G11C29/34;G11C29/52;(IPC1-7):G11C16/34 主分类号 G11C29/00
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