发明名称 System testing device and method using a JTAG circuit
摘要 A system testing device and method comprises a JTAG circuit provided with a JTAG instruction storage unit for storing a command to control a system logic circuit and a JTAG data storage unit for storing data used to control the system logic circuit, and tests the system logic circuit in an LSI by selectively inputting/outputting data to a boundary scan register, a bypass register, the JTAG instruction storage unit, and the JTAG data storage unit. <IMAGE>
申请公布号 EP0672910(B1) 申请公布日期 2003.06.04
申请号 EP19950103342 申请日期 1995.03.08
申请人 FUJITSU LIMITED 发明人 KAWANO, KAYOKO;TAKAKI, YASUSHI;SUTOU, SHINICHI;HARA, KAZUHIRO
分类号 G01R31/28;G01R31/3185;G06F11/22;G06F11/273 主分类号 G01R31/28
代理机构 代理人
主权项
地址