发明名称 Method and apparatus for locking self-timed pulsed clock
摘要 A method and apparatus for generating multiple locked self-timed pulsed clock signals is disclosed. Race margins are reduced over separate clock generating circuits by sharing the necessary delay circuit elements between the multiple clock generating circuits. An edge is gated with a delayed edge to form the first clock pulse. A subsequent second clock pulse is generated by gating a partially-delayed edge with the first clock pulse, which minimizes race margins and pulse evaporation.
申请公布号 US6573772(B1) 申请公布日期 2003.06.03
申请号 US20000608485 申请日期 2000.06.30
申请人 INTEL CORPORATION 发明人 DAI XIA;FLETCHER THOMAS D.
分类号 H03K3/356;H03K5/1534;(IPC1-7):G11C7/00;H03K17/28 主分类号 H03K3/356
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